[coyotos-dev] Issue with FXSAVE/FNSAVE

[Jonathan S. Shapiro]

It looks like Intel has planned ahead for this, insofar as they reserved
space for future expansion. Given where they are at the moment, this
doesn't seem likely to be an issue in the near term.

However, Jonathan Adams and I talked about it today and came to
basically the same conclusion you suggest. In essence, the choices are
to (a) make it a tagged union, or (b) provide emulation for the SIMD
instructions.

In abstract, I have no problem saying "P-III or later" for Coyotos,
except that a bunch of the embedded processors do not do SIMD. That's
the issue that's really driving us on this.


shap


On Tue, 2007-03-13 at 18:04 -0400, Christopher Nelson wrote:
>         Opinions? Should the implementation on older hardware simulate
>         the
>         FXSAVE-style save area? 
> 
> 
> What would you do in the future?  ie. Say another FP register set was
> added or the FP register set was changed significantly in some way and
> they added yet another FxxSAVE instruction?  Would you try to
> translate that into the older format + some regs, or force a kernel
> version partition on the FPU regs, or just update the bit? 
> 
> IMHO, if the data is user-readable anyway, why not just save a bit
> saying what format it uses, and then provide userland libraries that
> known how to decode the various formats.  That way you have a stable
> API, but also have a sort of future-proof roadmap. 
> 
> -={C}=-
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