[coyotos-dev] EROS small processes
Eric Northup
digitale at digitaleric.net
Tue Jan 23 13:58:09 CST 2007
Jonathan S. Shapiro wrote:
> On Tue, 2007-01-23 at 13:21 -0500, Eric Northup wrote:
>> Jonathan S. Shapiro wrote:
>>> Small spaces are a nuisance to implement. A while back AMD implemented a
>>> mechanism that significantly improved TLB flush performance, and in
>>> later processors Intel was forced to follow AMD's lead to keep
>>> competitive. It isn't clear how important the small space optimization
>>> is for these newer processors.
>> Due to errata and its general lack of improvement for common...
>
> Eric: can you provide pointers to the relevant errata?
>
Quoting AMD document 25759 "Revision Guide for AMD Athlon™ 64 and AMD
Opteron™ Processors" (Rev. 3.69 September 2006 ), the relevant one for
production processors is #122:
> TLB Flush Filter May Cause Coherency Problem in
> Multiprocessor Systems
> Description
> Under highly specific internal timing conditions in a multiprocessor configuration, coherency
> problems may arise between the page tables in memory and the translations stored in the on-chip
> TLBs. This can result in the possible use of stale translations even after software has performed a
> TLB flush.
> Potential Effect on System
> Unpredictable system failure. This scenario has only been observed in a highly randomized synthetic
> stress test.
> Suggested Workaround
> In multiprocessor or multicore systems, disable the TLB flush filter by setting HWCR.FFDIS (bit 6 of
> MSR 0xC001_0015).
> Fix Planned
> No
I haven't checked whether single-processor AMD64 systems enable it or
not, since all I have are dual-core.
-Eric
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