[bitc-dev] Bitc and Simd
bklooste at gmail.com
Tue Aug 17 18:56:30 PDT 2010
Were talking about the use of the XMM registers ( rather than SIMD but its
Now there are several approaches here
1) You can give the language first grade support for 128 and 256 GP
registers ( which are limited to 32 bits for + - / * but 128/256 for all
other ops ) .
2) You can try to get most common use cases and hand craft them in
assembly in libs eg memcpy
3) You can try to let the compiler optimize it by trying to work out if
SSE can be used but at present this just works for some stores and writes
and suffers from alignment issues. Hence 2.
Now the 2) case is common but not very portable ( hence my comments as the
L4 guys are very concerned about the IPC speed) and inferior to a language
solution . Note it's true that L4 don't use much SSE in their OS , but
This probably should be a spate thread but it does relate.
From: jonathan.s.shapiro at gmail.com [mailto:jonathan.s.shapiro at gmail.com] On
Behalf Of Jonathan S. Shapiro
Sent: Wednesday, August 18, 2010 6:37 AM
To: bklooste at gmail.com; Discussions about the BitC language
Subject: Re: [bitc-dev] Bitc and Simd
Tyler certainly doesn't speak for me on this, but the L4 guys aren't doing
much SIMD support in their OS, so I'm not sure what the point of this
exchange is, exactly.
On Mon, Aug 16, 2010 at 12:36 AM, Ben Kloosterman <bklooste at gmail.com>
It seems wrong that all the guys working on the L4 series OS have got it to
the point where they removed ( most of ?) the asm and made it more portable
while the libs are going the other way and we are seeing more assembly.
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